+​9140 -27141522 / 27141533

Apollo Computing Laboratories (P) Ltd

 ​mktg@apollocomputing.com

CCPMC Based  APOORVA-1553B Three Node BCRTMT Add On Card

Overview

CCPMC-1553B-3Node PMC module is based on ACL's APOORVA IP core and Spartan-6 FPGA.BC/RT/MT Bus Controller (BC), Remote Terminal (RT) and Monitor Terminal (MT) modes are independently supported on each channel of the PMC-1553B-3Node module.

Introduction :
The CCPMC-1553B-3Node provides three dual-redundant MIL-STD-1553B interfaces along with Eight RS-422 channels on a PMC/CCPMC module.It complements ACL's latest generation of PowerPC-750 based SBC with dual PMC/CCPMC sites.The CCPMC-1553B-3Node comes with VxWorks libraries.To provide full testability, the CCPMC-1553B-3 Node is supplied with Built-In-Test (BIT). BIT software routines, which provides diagnostics to give confidence in the sub-system integration.The product is available in standard air-cooled level as well as Conduction Cooled versions.

CCPMC Based  APOORVA-1553B Four Node BCRTMT Add On Card

Overview

The APOORVA-1553B Based BCRTMT is a CCPMC Four Node MIL-STD-1553B interface card which can be hosted by any SBC with PMC sites. The CCPMC card provides up to Four independently configurable buses. Each Bus provides simultaneously dual redundant BC/RT/MT or BC, RT & MT (based on ACL’s APOORVA-1553B Core) concurrently conforming to MIL-STD-1553B Notice-2. The design supports multiple modules on single SBC - limitations being: available system free CCPMC sites and computational power of the Computer. Thus, the APOORVA-CCPMC-FOUR-BCRTMT-1553B is an excellent choice for dynamic real-time avionics simulations. The on-board double buffered dual port memory facilitates parallel message preparation & transfers, increasing the effective throughput.

The APOORVA-1553B Based BCRTMT module comes with Real Time Operating System (RTOS) Bus Libraries, powerful C-callable library routines to access the bus at various levels of abstraction, hardware complexities being transparent to the user. The performance of APOORVA-1553B Based BCRTMT is far superior to solutions offered by others around the globe.

Apoorva provides a unique facility to the user to enable or disable the messages in the Frame.

Techincal Features

  • ✓
    Up to Four independently configurable buses. Each Bus provides simultaneously dual redundant BC/RT/MT or BC, RT & MT nodes (based on options chosen) conforming to MIL-STD-1553B Notice-2.on one system free CCPMC site.

  • ✓
    Supports full MIL-STD-1553B Notice-2.

  • ✓
    Supports all 1553B message formats and mode-codes.

  • ✓
    On board time-tag counter.
  • ✓
    RT Sub-address circular buffers to support bulk data transfers.

  • ✓
    Optional separation of RT broadcast data.

  • ✓
    Each channel supports double buffered dual ported 7.5 K X 16 bit memory for preparation and transfer.

  • ✓
    Programmable RT address.

  • ✓
    High performance.

  • ✓
    Two on-board timers.

  • ✓
    ✓
    Typical Inter-message gap of 10 micro seconds. Optionally 4.20 micro seconds.
  • ✓
    Scalable architecture supporting intra system expandability.

  • ✓
    Supports multiple bus simulation on single Computing system.

  • ✓
    Ideal for real-time avionics simulation.

  • ✓
    Bus Libraries: Powerful C-callable routines to support BC/RT/MT or BC, RT & MT functions.

  • ✓
    Powerful message debugging facility.
  • ✓
    Unprecedented Flexibility: Minor Frame Time Programmable in steps of 1.0 milli seconds accurately along with Minor frame messages loadable in hardware itself to provide accurate real-time performance.

  • ✓
    Built in Diagnostic and test S/W for diagnostics.

  • ✓
    Real Time OS Bus Libraries.

MEMORY

As BC 7.5 K words
As RT 7.5 K words
As MT 16 K words
Circular Buffer 15 K words

With the APOORVA-1553B Based BCRTMT module, the following Errors can be injected to verify the LRUs and other systems functionin

Manchester errors Bi-phase errors
Bit length errors Sync errors
Word count errors Gap time introduction etc.
Bus Information

Ordering Information

CCPMC Based  APOORVA-1553B Four Node MRTBCMT Add On Card

Overview

The APOORVA-1553B Based MRTBCMT is a CCPMC Four Node MIL-STD-1553B card and can be hosted by any standard single board computer with CCPMC sites providing simultaneously Four buses each with dual redundant 31RTs, BC & MT (based on ACL’s Apoorva-1553B Core) concurrently conforming to MIL-STD-1553B Notice-2. The design supports a single SBC hosting multiple modules - limitations being: available CCPMC sites and computational power of SBC. Thus, the APOORVA-1553B Based MRTBCMT is an excellent choice for dynamic real-time avionics simulations. The on-board double buffered dual port memory facilitates parallel message preparation & transfers, increasing the effective throughput.

The APOORVA-1553B Based MRTBCMT module comes with Real Time Operating System (RTOS) Bus Libraries, powerful C-callable library routines to access the bus at various levels of abstraction, hardware complexities being transparent to the user. The performance of APOORVA-1553B Based MRTBCMT is far superior to solutions offered by others around the globe.Apoorva provides a unique facility to the user to enable or disable the messages in the Frame.

Techincal Features

  • ✓
    Provides simultaneously up to Four buses each with dual redundant 31RTs, BC & MT (based on ACL’s APOORVA-1553B Core) conforming to MIL-STD-1553B Notice-2 on one free CCPMC site.

  • ✓
    Supports full MIL-STD-1553B Notice-2.

  • ✓
    Supports all 1553B message formats and mode-codes.

  • ✓
    On board time-tag counter.

  • ✓
    RT Sub-address circular buffers to support bulk data transfers.
  • ✓
  • Optional separation of RT broadcast data.

  • ✓
    Each channel supports double buffered dual ported 7.5 K X 16 bit memory for preparation and transfer.

  • ✓
    Programmable RT address.

  • ✓
    High performance.
  • ✓
    Scalable architecture supporting intra system expandability.

  • ✓
    Supports multiple bus simulation on single Computing system.

  • ✓
    Ideal for real-time avionics simulation.

  • ✓
    Built in test S/W for diagnostics.

  • ✓
    Bus Libraries: Powerful C-callable routines to support BC, RT & MT functions.
  • ✓
    Powerful message debugging facility.

  • ✓
    Unprecedented Flexibility: Minor Frame Time Programmable in steps of 1.0 milli seconds accurately along with Minor frame messages loadable in hardware itself to provide accurate real-time performance.

  • ✓
    Typical Inter-message gap of 10 micro seconds.

  • ✓
    Real Time OS Bus Libraries.

MEMORY

As BC 7.5 K words
As RT 7.5 K words
As MT 16 K words
Circular Buffer 256 K words

With the APOORVA-1553B Based MRTBCMT module, the following Errors can be injected to verify the LRUs and other systems functioning:

Manchester errors Bi-phase errors
Bit length errors Sync errors
Word count errors Gap time introduction etc.

Bus Libraries

Ordering Information