PowerPC-750/7410 VME bus based
Ruggedized CPU card with Two PMC/CCPMC sites

PowerPC-750/7410 Board

CCPMC-1553B Module Provides Two Dual Redundant MIL-STD-1553B Buses along with 4 RS-422 Channels and 8 DIOs (Optional module)

General Information

The PowerPC-750/7410 card is a 6U (233.35mm x 160mm) Conduction Cooled VME card which has a PowerPC-750/7410 CPU chip operating with an internal clock frequency of 200MHz (PowerPC-750) and 400MHz (PowerPC-7410) and an external processor bus frequency of 66.66MHz.

PowerPC-750 is a high performance Reduced Instruction Set Computer (RISC) super-scalar processor.
PowerPC-7410 is a high performance PowerPC G4 Series RISC super-scalar processor with AltiVec technology.

Both PowerPC-750 and 7410 have 64KB inbuilt L1 Cache (32KB Instruction Cache, 32KB Data Cache). PowerPC-750 has 1MB of inbuilt L2 cache and 7410 has 2MB of inbuilt L2 cache. The CPU card has 32MB of SDRAM (4M x 72), 2MB of boot FLASH and 4MB of user FLASH.

CPU card has PCI bus as a local bus and VME bus as a back plane bus. PCI bus interface is provided through the bridge chip IBM CPC-700. VME interface is provided through the bridge chip Tundra Universe-II. The CPC-700 provides a bridge between the PowerPC-750 / 7410 processor to the PCI bus as well as a high-speed memory controller besides having some peripherals built in. SDRAM, Boot FLASH and User FLASH are connected on the memory bus of the CPC-700. Power-on booting routines are stored in the Boot FLASH. User FLASH contains all user application programs. CPC-700 has two inbuilt UARTs (Universal Asynchronous Receiver Transmitter). Two RS422/RS232 selectable serial links are provided through these two UARTs of the CPC700.

CPC-700 has two IIC bus interfaces. One serial EEPROM is interfaced to one of the IIC interface of the CPC-700. One Real Time Clock is interfaced to the other IIC bus interface. CPC-700 has 10 General-purpose timers and an inbuilt Interrupt controller. Interrupt controller supports 29 interrupts (12 External interrupts).

10/100Mbps Ethernet interface is provided through Ethernet Controller AM79C972 which is directly sitting on the PCI bus. The different clocks for PowerPC-750/7410, SDRAM, CPC700 and PCI bus are generated using a Phased Locked Loop (PLL) Clock Driver Circuit. The PowerPC-750/7410 CPU card requires four different supply voltages (5V, 3.3V and 2.5V, 1.8V). The CPU card operates with 5V external supply. The 3.3V, 2.5V and 1.8V supply voltages are derived using on board linear regulators. A watchdog timer is provided in the Power SupplyMonitorCircuit

PowerPC-750/7410 CPU Card Specifications

PCB Size & TYPE	6U (233.35mm x 160mm) as per IEEE 1101.1 , Integrated Heat Sync type
Cooling	Conduction Cooled PCB
PMC sites	Two CCPMC (Conduction cooled PMC) sites as per VITA 20-1992
CPU	PowerPC-750 @ 200MHz/ PowerPC-7410 @ 400MHz
Memory	32MB SDRAM (4M x 72) MB of L2 cache for PowerPC-750 2MB of L2 cache for PowerPC-7410 4MB User Flash 2MB Boot Flash
Memory Controller & PCI Bridge	CPC-700
Timers	10 General Purpose Timers – 32 bit wide
Serial port	2 x RS-422/RS-232 Selectable
Interrupt Controller	12 Ext, 10 Timer interrupts 2 UART, 2 IIC, 1 ECC, total 29 interrupts. 2 PCI internal
Two IIC Interfaces	One IIC serial EEPROM (4Kbits) One IIC Real Time Clock
Back plane	VME bus interface Address : A16/A24/A32 Data : D16/D24/D32
VME Bridge	Universe-II
Network	10/100 Mbps Ethernet (UTP)
Connectors	RJ45, 9 pin D-type connector on front panel and P0, P1, P2 VME Connectors on the Back plane.
Firmware	Support for BSP under VxWorks

Operating temperature	-40°C to +65°C
Power Consumption	8 - 10 Watt

Ordering Information

ACL-PPC-750 : PowerPC-750 VME bus based Ruggedized * CPU card with Two CCPMC Sites*

ACL-PPC-7410 :PowerPC-7410 VME bus based Ruggedized CPU card with Two CCPMC Sites*

Options should be spelt out clearly, otherwise standard configuration will be presumed.ACL is continuously working on improvements of its products; hence these specifications are subject to change without any notice. Wherever the products are updated, the updated/revised version will be supplied.